Trench silicon-on-insulator (SOI) DRAM cell
US7800111B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2008 |
| Grant date | Sep 21, 2010 |
| Priority date | — |
| Expiry date | Feb 3, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6744
Abstract
The present invention relates to a trench silicon-on-insulator (SOI) dynamic random access memory (DRAM) cell and a method for making the same. A source and a drain are utilized to each connect to one of two semiconductor conductive units on an external side of a main body having a plurality of semiconductor conductive units, and the semiconductor conductive units are utilized to accumulate electric charges generated from the drain so as to decrease a threshold voltage. In addition, the DRAM cell only uses one field effect transistor (FET) device (1T), has characteristics of the conventional 1T-DRAM, and has higher integration density. Moreover, the process of the invention is simple, so the production cost can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.