High electron mobility transistor semiconductor device having field mitigating plate and fabrication method thereof
US7800132B2 · kind B2 · utility
10Cited by
8References
9Claims
0Family size
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Key dates
| Filing date | Oct 25, 2007 |
| Grant date | Sep 21, 2010 |
| Priority date | — |
| Expiry date | Feb 16, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
A semiconductor device includes a T-gate disposed between drain and source regions and above a barrier layer to form a Schottky contact to the channel layer. A first inactive field mitigating plate is disposed above a portion of the T-gate and a second active field plate is disposed above the barrier layer and in a vicinity of the T-gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.