Data output buffer circuit
US7800416B2 · kind B2 · utility
6Cited by
18References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2008 |
| Grant date | Sep 21, 2010 |
| Priority date | — |
| Expiry date | Dec 22, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4093
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data output circuit includes a pre-driving block configured to receive input data, generate a plurality of pull-up signals and pull-down signals, and change enable times of the pull-up signals and the pull-down signals in response to a plurality of control signals, and a main driving block configured to generate output data in response to the pull-up signals and the pull-down signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.