Field effect transistor (FET) devices and methods of manufacturing FET devices
US7804137B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2007 |
| Grant date | Sep 28, 2010 |
| Priority date | — |
| Expiry date | Nov 22, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
In one aspect, a semiconductor substrate is provided having a cell area and a peripheral circuit area, and a mask layer is formed over the cell area and the peripheral circuit area of the semiconductor substrate. A FinFET gate is fabricated by forming a first opening in the mask layer to expose a first gate region in the cell area of the semiconductor substrate, and then forming a FinFET gate electrode in the first opening using a damascene process. A MOSFET gate fabricated by forming a second opening in the mask layer to expose a second gate region in the peripheral circuit area of the semiconductor substrate, and then forming a MOSFET gate electrode in the second opening using a damascene process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.