Ball grid array structures having tape-based circuitry
US7804168B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 17, 2008 |
| Grant date | Sep 28, 2010 |
| Priority date | — |
| Expiry date | Aug 6, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor device packages formed in accordance with methods of packaging semiconductor dice in grid array-type semiconductor device packages using conventional lead frame or lead lock tape assembly equipment are disclosed. Circuitry-bearing structure having an electrically insulating layer that carries redistribution electrical connections having redistributed bond pads and conductive traces and which is supported from beneath by a support layer are configured for securing to the active surface of a semiconductor die. The support layer may comprise an electrically conductive material, which may act as a heat sink or as a ground plane for the packaged semiconductor device. A semiconductor device and a semiconductor assembly are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.