Patent · US Active

Circuits and methods for testing FPGA routing switches

US7804321B2 · kind B2 · utility

2Cited by

2References

9Claims

0Family size

Assignee

Actel Corporation · US

Inventors

Jonathan W. Greene · Palo Alto, US
John McCollum · Saratoga, US
Volker Hecht · Barsinghausen, DE

Key dates

Filing date	Sep 5, 2008
Grant date	Sep 28, 2010
Priority date	—
Expiry date	Sep 5, 2028

Classification

Technology area (CPC G)Physics
CPC primaryG01R31/318519
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An FPGA architecture includes multiplexers having non-volatile switches having control gates coupled to word lines W, each word line associated with a row, the switches connecting to wiring tracks through buffers having a controllable ground connection NGND, at least some of the switches being a tie-off switch coupleable to one of a plurality of bitlines B, each bitline associated with column.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.