Patent · US Active

Error accumulation register, error accumulation method, and error accumulation system

US7805634B2 · kind B2 · utility

44Cited by
8References
5Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 16, 2006
Grant dateSep 28, 2010
Priority date
Expiry dateMay 16, 2028

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/1407
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In operating a dual core processor, a register file collects a history of the error state information for each core. The core error state data can be analyzed to understand the recovery sequence of events. The recorded error sequence over time presents a detailed history of the recovery sequence which is useful to understand complex error scenarios.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.