Semiconductor packages and methods of fabricating the same
US7807512B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2009 |
| Grant date | Oct 5, 2010 |
| Priority date | — |
| Expiry date | Apr 20, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15331
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package and module, and methods of fabricating the same are provided. A method of fabricating a semiconductor package may include bonding rear surfaces of first and second semiconductor chips to each other, each of the semiconductor chips having chip pads exposed on front surfaces. The method may also include forming an encapsulation portion configured to encapsulate side surfaces of the bonded semiconductor chips, forming via plugs configured to pass through the encapsulation portion, forming an insulating layer configured to expose surfaces of the chip pads and the via plugs on the exposed surfaces of the two semiconductor chips and surfaces of the encapsulation portion, and forming package pads on the exposed surfaces of the chip pads and the surfaces of the via plugs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.