Sequential selective epitaxial growth
US7807523B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2007 |
| Grant date | Oct 5, 2010 |
| Priority date | — |
| Expiry date | Feb 28, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not ordinarily suitable for device production. MOSFETs that subsequently incorporate the high-precision ridges into their channel regions will typically exhibit much more precise and less variable performance than similar MOSFETs formed using optical lithography-based techniques that cannot provide the same degree of patterning accuracy. A multi step epitaxial process can be used to extend the ridges with different dopant types, high mobility semiconductor, and or advanced multi-layer strutures. For CMOS integrated circuits a capping layer is formed over the a first region. Epitaxial layers are formed in a second region. Then the capping layer is removed from the first region and a capping layer is formed ove…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.