Patent · US Active

Mask structure for manufacture of trench type semiconductor device

US7808029B2 · kind B2 · utility

0Cited by

8References

23Claims

0Family size

Assignee

Siliconix Technology C. V. · SG

Inventors

Luigi Merlin · Torino, IT
Giovanni Richieri · Druento, IT
Rossano Carta · Torino, IT

Key dates

Filing date	Apr 23, 2007
Grant date	Oct 5, 2010
Priority date	—
Expiry date	Oct 25, 2027

Classification

Technology area (CPC H)Electricity
CPC primaryH10D84/035
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A mask structure and process for forming trenches in a silicon carbide or other wafer, and for implanting impurities into the walls of the trenches using the same mask where the mask includes a thin aluminum layer and a patterned hard photoresist mask. A thin LTO oxide may be placed between the metal layer and the hard photoresist mask.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.