Semiconductor device with relatively high breakdown voltage and manufacturing method
US7808050B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 14, 2006 |
| Grant date | Oct 5, 2010 |
| Priority date | — |
| Expiry date | Jul 19, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6717
Abstract
A semiconductor device includes at least one active component (18) having a p-n junction (26) on the semiconductor substrate in an active region (19) of the semiconductor substrate (4). A shallow trench isolation pattern is used to form a plurality of longitudinally extending shallow trenches (12) containing insulator (14). These trenches define a plurality of longitudinal active stripes (10) between the shallow trenches (12). The shallow trench isolation depth (dsπ) is greater than the junction depth (dsO of the longitudinal active stripes and the width (wsO of the active stripes (10) is less than the depletion length (ldepi) of the p-n junction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.