Methods of manufacturing reference sample substrates for analyzing metal contamination levels
US7811836B2 · kind B2 · utility
1Cited by
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19Claims
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Key dates
| Filing date | Dec 27, 2006 |
| Grant date | Oct 12, 2010 |
| Priority date | — |
| Expiry date | Mar 12, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T436/108331
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method of manufacturing a reference sample substrate for analyzing a metal contamination level includes coating an organic silica solution including metal impurities on a semiconductor substrate and forming an oxide layer on the semiconductor substrate by thermally treating the semiconductor substrate having the coated organic silica solution. The metal impurities are substantially uniformly distributed in the oxide layer and the metal impurities are positioned at predetermined portions of the oxide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.