MuGFET array layout
US7812373B2 · kind B2 · utility
37Cited by
7References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2007 |
| Grant date | Oct 12, 2010 |
| Priority date | — |
| Expiry date | Oct 6, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/903
Abstract
A circuit array includes a plurality cells, wherein each cell has at least one group of odd fins. The cells may be arranged in a repeating pattern that includes mirror images of the pattern. A plurality of fin forming regions are provided about which the fins are formed for the dual fin and single fin transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.