Wafer level package with die receiving through-hole and method of the same
US7812434B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 3, 2007 |
| Grant date | Oct 12, 2010 |
| Priority date | — |
| Expiry date | Feb 3, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a structure of package comprising: a substrate with a die receiving through hole; a base attached on a lower surface of the substrate; a die disposed within the die receiving through hole and attached on the base; a dielectric layer formed on the die and the substrate; a re-distribution layer (RDL) formed on the dielectric layer and coupled to the die; a protection layer formed over the RDL; and pluralities of pads formed on the protection layer and coupled to the RDL. The RDL is made from an alloy comprising Ti/Cu/Au alloy or Ti/Cu/Ni/Au alloy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.