Patent · US Active

Bias voltage generation circuit and clock synchronizing circuit

US7812650B2 · kind B2 · utility

4Cited by
15References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 9, 2008
Grant dateOct 12, 2010
Priority date
Expiry dateAug 9, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L2207/06
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Bias voltage generator circuit and clock synchronizing circuit includes a bias unit configured to control a current in response to a bandwidth control signal, an amplification unit configured to differentially amplify an input signal in response to the current controlled by the bias unit and an output unit configured to receive an output signal of the amplification unit to output the bias voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.