PC-based computing system employing a silicon chip of monolithic construction having a routing unit, a control unit and a profiling unit for parallelizing the operation of multiple GPU-driven pipeline cores according to the object division mode of parallel operation
US7812846B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2007 |
| Grant date | Oct 12, 2010 |
| Priority date | — |
| Expiry date | Dec 22, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A PC-based computing system employing a silicon chip having a routing unit, a control unit and profiling unit for parallelizing multiple GPU-driven pipeline cores according to the object division mode of parallelization operation, during a graphics application. The PC-based computing system includes system memory for storing software graphics applications, software drivers and graphics libraries, and an operating system (OS), stored in the system memory, and a central processing unit (CPU), for executing the OS, graphics applications, drivers and graphics libraries. The system also includes a CPU/memory interface module and a CPU bus. The routing unit (i) routes the stream of geometrical data and graphic commands from the graphics application to one or more of the GPU-driven pipeline cores, and (ii) routes pixel data output from one or more of GPU-driven pipeline cores during the composition of frames of pixel data corresponding to final images for display on the display surface. The control unit accepts commands from the software multi-pipe drivers, and controls components within the silicon chip, including the routing unit. The profiling unit profiles the performance of the GPU-d…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.