Semiconductor array including a matrix of cells and a method of making a semiconductor array having a matrix of cells
US7817466B2 · kind B2 · utility
1Cited by
3References
25Claims
0Family size
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Key dates
| Filing date | May 30, 2008 |
| Grant date | Oct 19, 2010 |
| Priority date | — |
| Expiry date | Aug 28, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor array includes a matrix of cells, the matrix being arranged in rows and columns of cells, and a plurality of control lines. Each cell is coupled to a number of control lines allowing to select and read/write said cell. At least one of said control lines is coupled to cells of a plurality of columns and of at least two rows of the matrix.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.