Method and apparatus for implementing a field programmable gate array architecture with programmable clock skew
US7818705B1 · kind B1 · utility
26Cited by
30References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 8, 2005 |
| Grant date | Oct 19, 2010 |
| Priority date | — |
| Expiry date | Jan 3, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/396
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A skew generator unit includes a delay chain. The delay chain is coupled to a clock line that transmits a clock signal. The delay chain generates a skewed clock signal having a unit of delay from the clock signal. The skew generator unit also includes a selector. The selector is coupled to the delay chain and the clock line and may select one of the clock signal and the skewed clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.