Multilayered BOX in FDSOI MOSFETS

US7821066B2 · kind B2 · utility

Inventors

• Michael S. Lebby · Apache Junction, US
• Vijit Sabnis · Menlo Park, US
• Petar Atanackovic · Adelaide, AU

Key dates

• Filing date: Dec 8, 2006
• Grant date: Oct 26, 2010
• Expiry date: Aug 9, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6744

Abstract

A fully depleted MOSFET has a semiconductor-on-insulator substrate that includes a substrate material, a BOX positioned on the substrate material, and an active layer positioned on the BOX. The BOX includes a first layer of material with a first dielectric constant and a first thickness and a second layer of material having a second dielectric constant different than the first dielectric constant and a second thickness different than the first thickness. The first layer of material is positioned adjacent the substrate material and the second layer of material is positioned adjacent the active layer. Drain and source regions are formed in the active layer so as to be fully depleted. The drain and source regions are separated by a channel region in the active layer. A gate insulating layer overlies the channel region and a gate stack is positioned on the gate insulating region. It is anticipated that the structure is most useful for channel regions less than 90 nm long.