Semiconductor die package including leadframe with die attach pad with folded edge
US7821116B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 5, 2007 |
| Grant date | Oct 26, 2010 |
| Priority date | — |
| Expiry date | Jun 27, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor die package is disclosed. The semiconductor die package comprises a leadframe structure with a die attach pad including a die attach surface, a folded edge structure and an opposite surface opposite to the die attach surface. A plurality of leads extending laterally away from the die attach pad. A semiconductor die comprising a first surface and a second surface is attached to the semiconductor die, and a molding material is around at least a portion of the leadframe structure and at least a portion of the semiconductor die. The opposite surface is exposed through the molding material and terminal ends of the leads do not extend past lateral edges of the molding material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.