Inventor · Talisay, PH

Ruben Madrid

18Patents
7h-index
9Co-inventors
55Inventor score

Filing activity: Oct 31, 1997 → Jan 13, 2011

Most-cited inventions

PatentTitleAreaCited byStatus
US6777800B2 Semiconductor die package including drain clip Electricity 135 Expired
US6893901B2 Carrier with metal bumps for semiconductor die packages Electricity 62 Expired
US7023077B2 Carrier with metal bumps for semiconductor die packages Electricity 47 Expired
US6646329B2 Power chip scale package Electricity 37 Expired
US7663211B2 Dual side cooling integrated power device package and module with a clip attached to a leadframe in the package and the module and methods of manufacture Electricity 26 Active
US8193618B2 Semiconductor die package with clip interconnection Electricity 11 Active
US6861286B2 Method for making power chip scale package Electricity 9 Expired
US8193622B2 Thermally enhanced thin semiconductor package Electricity 7 Active
US6006981A Wirefilm bonding for electronic component interconnection Emerging Cross-Sectional Technologies 7 Expired
US7821116B2 Semiconductor die package including leadframe with die attach pad with folded edge Electricity 7 Active
US6707135B2 Semiconductor leadframe for staggered board attach Emerging Cross-Sectional Technologies 7 Expired
US7402462B2 Folded frame carrier for MOSFET BGA Electricity 4 Active
US7002240B2 Semiconductor leadframe for staggered board attach Emerging Cross-Sectional Technologies 4 Expired
US7576429B2 Packaged semiconductor device with dual exposed surfaces and method of manufacturing Electricity 3 Active
US7893548B2 SiP substrate Electricity 2 Active
US6857459B1 Wirefilm bonding for electronic component interconnection Emerging Cross-Sectional Technologies 2 Expired
US8372690B2 SiP substrate Electricity 0 Active
US7816178B2 Packaged semiconductor device with dual exposed surfaces and method of manufacturing Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.