Memory cell readout using successive approximation
US7821826B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2007 |
| Grant date | Oct 26, 2010 |
| Priority date | — |
| Expiry date | Nov 15, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for operating a memory (20) includes storing analog values in an array of analog memory cells (22), so that each of the analog memory cells holds an analog value corresponding to at least first and second respective bits. A first indication of the analog value stored in a given analog memory cell is obtained using a first set of sampling parameters. A second indication of the analog value stored in the given analog memory cell is obtained using a second set of sampling parameters, which is dependent upon the first indication. The first and second respective bits are read out from the given analog memory cell responsively to the first and second indications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.