Thermally aware design modification
US7823102B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2008 |
| Grant date | Oct 26, 2010 |
| Priority date | — |
| Expiry date | Jun 9, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a first variation, a thermally aware design automation suite integrates system-level thermal awareness into design of semiconductor chips, performing fine-grain thermal simulations of the chips based on thermal models and boundary conditions. The suite uses results of the simulations to modify thermally significant structures to achieve desired thermal variations across a chip, meet design assertions on selected portions of the chip, and verify overall performance and reliability of the chip over designated operating ranges and manufacturing variations. In a second variation, a discretization approach models chip temperature distributions using heuristics to adaptively grid space in three dimensions. Adaptive and locally variable grid spacing techniques are used to efficiently and accurately converge for steady state and/or transient temperature solutions. The modeling optionally reads a mesh initialization file specifying selected aspects and parameters associated with controlling use and behavior of the variable grid spacing techniques.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.