Silicon carbide semiconductor device and related manufacturing method
US7825449B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2008 |
| Grant date | Nov 2, 2010 |
| Priority date | — |
| Expiry date | Oct 30, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/64
Abstract
An SiC semiconductor device and a related manufacturing method are disclosed having a structure provided with a p+-type deep layer formed in a depth equal to or greater than that of a trench to cause a depletion layer between at a PN junction between the p+-type deep layer and an n−-type drift layer to extend into the n−-type drift layer in a remarkable length, making it difficult for a high voltage, resulting from an adverse affect arising from a drain voltage, to enter a gate oxide film. This results in a capability of minimizing an electric field concentration in the gate oxide film, i.e., an electric field concentration occurring at the gate oxide film at a bottom wall of the trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.