Semiconductor chip structure, method of manufacturing the semiconductor chip structure, semiconductor chip package, and method of manufacturing the semiconductor chip package
US7825495B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2008 |
| Grant date | Nov 2, 2010 |
| Priority date | — |
| Expiry date | Jun 18, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18301
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip structure may include a semiconductor chip, a first insulation layer and a redistribution layer. The first insulation layer may be formed on the semiconductor chip. The first insulation layer may have at least one first groove formed at an upper surface portion of the first insulation layer. Further, the at least one first groove may have an upper width and a lower width greater than the upper width. The redistribution layer may be partially formed on the first insulation layer. The redistribution layer may have at least one first protrusion formed on a lower surface portion of the redistribution layer. The first protrusion may have an upper width and a lower width less than the upper width. The first protrusion may be inserted into the at least one first groove.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.