Circuit for a low power mode
US7825720B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2009 |
| Grant date | Nov 2, 2010 |
| Priority date | — |
| Expiry date | Feb 27, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/147
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A circuit has a first transistor having a first current electrode coupled to a first supply voltage terminal and a second current electrode coupled to a virtual supply voltage node. A second transistor has a first current electrode coupled to the first supply voltage terminal and a control electrode coupled to the virtual supply voltage node. A first load has an input and has an output coupled to a second current electrode of the second transistor. A third transistor has a control electrode coupled to the output of the first load. A second load has an input coupled to the first supply voltage terminal, and has an output that is coupled to both a control electrode of the first transistor and a first current electrode of the third transistor. The virtual supply voltage node provides an operating voltage to a circuit module that alternates between normal and drowsy operating modes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.