Silicon wafer and process for the heat treatment of a silicon wafer
US7828893B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2006 |
| Grant date | Nov 9, 2010 |
| Priority date | — |
| Expiry date | Aug 23, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T117/1068
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A silicon wafer having no epitaxially deposited layer or layer produced by joining to the silicon wafer, with a nitrogen concentration of 1·1013-8·1014 atoms/cm3, an oxygen concentration of 5.2·1017-7.5·1017 atoms/cm3, a central thickness BMD density of 3·108-2·1010 cm−3, a cumulative length of linear slippages ≦3 cm and a cumulative area of areal slippage regions ≦7 cm2, the front surface having <45 nitrogen-induced defects of >0.13 μm LSE in the DNN channel, a layer at least 5 μm thick, in which ≦1·104 COPs/cm3 with a size of ≧0.09 μm occur, and a BMD-free layer ≧5 μm thick. Such wafers may be produced by heat treating the silicon wafer, resting on a substrate holder, a specific substrate holder used depending on the wafer doping. For each holder, maximum heating rates are selected to avoid formation of slippages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.