Vertical carbon nanotube field effect transistors and arrays
US7829883B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2004 |
| Grant date | Nov 9, 2010 |
| Priority date | — |
| Expiry date | Feb 12, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/734
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Carbon nanotube field effect transistors, arrays of carbon nanotube field effect transistors, device structures, and arrays of device structures. A stacked device structure includes a gate electrode layer and catalyst pads each coupled electrically with a source/drain contact. The gate electrode layer is divided into multiple gate electrodes and at least one semiconducting carbon nanotube is synthesized by a chemical vapor deposition process on each of the catalyst pads. The gate electrode has a sidewall covered by a gate dielectric and at least one semiconducting carbon nanotube adjacent to the sidewall of the gate electrode. Source/drain contacts are electrically coupled with opposite ends of the semiconducting carbon nanotube to complete the device structure. Multiple device structures may be configured either as a memory circuit or as a logic circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.