Data processing apparatus and method for identifying sequences of instructions
US7831815B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2008 |
| Grant date | Nov 9, 2010 |
| Priority date | — |
| Expiry date | May 10, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3822
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing apparatus is provided comprising a processing unit for executing instructions, a cache structure for storing instructions retrieved from memory for access by the processing unit, and profiling logic for identifying a sequence of instructions that is functionally equivalent to an accelerator instruction. When such a sequence of instructions is identified, the equivalent accelerator instruction is stored in the cache structure as a replacement for the first instruction of the sequence, with the remaining instructions in the sequence of instructions being stored unchanged. The accelerator instruction includes an indication to cause the processing unit to skip the remainder of the sequence when executing the accelerator instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.