SCR controlled by the power bias
US7834378B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2007 |
| Grant date | Nov 16, 2010 |
| Priority date | — |
| Expiry date | Apr 18, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/713
Abstract
A composite dual SCR circuit that acts to protect the Vcc node as well as an I/O node or pin. The dual SCR uses the Vcc to control or program the triggering point of the SCR connected to an I/O node. When Vcc is low, the SCR protecting an I/O node triggers a few volts above ground, but when Vcc is high the trigger point of the SCR protecting the I/O node is much higher. The dual SCR incorporates added diffusions to an existing first SCR structure between the power node and the ground node thereby forming a second SCR. The first and second SCRs share a common cathode transistor. In one illustrative embodiment, only one SCR is constructed incorporating the Vcc to control the triggering of the SCR.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.