Patent · US Active

Sampling error reduction in PWM-MASH converters

US7834789B2 · kind B2 · utility

3Cited by
12References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 6, 2009
Grant dateNov 16, 2010
Priority date—
Expiry dateApr 6, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M3/46
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Techniques for reducing sampling error in electronic components are described herein.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.