Replacement spacers for MOSFET fringe capacitance reduction and processes of making same
US7838373B2 · kind B2 · utility
44Cited by
4References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2008 |
| Grant date | Nov 23, 2010 |
| Priority date | — |
| Expiry date | Feb 11, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process includes planarizing a microelectronic device that includes a gate stack and adjacent trench contacts. The process also includes removing a gate spacer at the gate stack and replacing the gate spacer with a dielectric that results in a lowered overlap capacitance between the gate stack and an adjacent embedded trench contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.