Patent · US Active

Multifunctional handler system for electrical testing of semiconductor devices

US7838790B2 · kind B2 · utility

5Cited by
1References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 9, 2007
Grant dateNov 23, 2010
Priority date
Expiry dateJan 8, 2029

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S414/135
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A multifunctional handler system for electrical testing of semiconductor devices is provided. The multifunctional handler system comprises: (1) a semiconductor device processing section comprising a loading unit including a buffer, a sorting unit including a separate marking machine, and a unloading unit; (2) a semiconductor device testing section, separate from the semiconductor device processing section, comprises a test chamber, the test chamber is separated into two or more test spaces, and the test spaces of the test chamber include a second chamber positioned at a lower position, a first chamber positioned above the second chamber, and pipelines for connecting the first and second chambers to each other; and (3) a host computer which is independently connected to the semiconductor device processing section and the semiconductor device testing section and controls tray information, test results, marking information, and test program information.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.