Process for manufacturing a multi-drain electronic power device integrated in semiconductor substrate and corresponding device

US7838927B2 · kind B2 · utility

Assignee

• STMicroelectronics SA

Inventors

• Mario Giuseppe Saggio · Nettuno, IT
• Ferruccio Frisina · Gravina di Catania, IT
• Simone RASCUNÁ · Catania, IT

Key dates

• Filing date: Jan 8, 2008
• Grant date: Nov 23, 2010
• Expiry date: Apr 13, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/393

Abstract

A process manufactures a multi-drain power electronic device on a semiconductor substrate of a first conductivity type and includes: forming a first semiconductor layer of the first conductivity type on the substrate, forming a second semiconductor layer of a second conductivity type on the first semiconductor layer, forming, in the second semiconductor layer, a first plurality of implanted regions of the first conductivity type using a first implant dose, forming, above the second semiconductor layer, a superficial semiconductor layer of the first conductivity type, forming in the surface semiconductor layer body regions of the second conductivity type, thermally diffusing the implanted regions to form a plurality of electrically continuous implanted column regions along the second semiconductor layer, the plurality of implanted column regions delimiting a plurality of column regions of the second conductivity type aligned with the body regions.