System and method for measuring overlay errors
US7842933B2 · kind B2 · utility
38Cited by
29References
8Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 22, 2003 |
| Grant date | Nov 30, 2010 |
| Priority date | — |
| Expiry date | Sep 9, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system and method for detecting overlay errors, the method includes (i) directing a primary electron beam to interact with an inspected object; whereas the inspected object comprises a first feature formed on a first layer of the inspected object and a second feature formed on a second layer of the object, wherein the second feature is buried under the first layer and wherein the second feature affects a shape of an area of the first layer; (ii) detecting electrons reflected or scattered from the area of the first layer; and (iii) receiving detection signals from at least one detector and determining overlay errors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.