Patent · US Active

Gate electrode structure, MOS field effect transistors and methods of manufacturing the same

US7842977B2 · kind B2 · utility

1Cited by

5References

22Claims

0Family size

Assignee

Qimonda AG · DE

Inventors

Stefan Jakschik · Kessel-Lo, BE
Thomas Hecht · Dresden, DE

Key dates

Filing date	Feb 15, 2007
Grant date	Nov 30, 2010
Priority date	—
Expiry date	Feb 15, 2027

Classification

Technology area (CPC H)Electricity
CPC primaryH10D84/038
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A gate electrode structure comprises at least one bi-layer, wherein each bi-layer comprises a plating film and a stress amplifier film. The plating film includes a poly-crystalline material. The stress amplifier film determines the crystallization result of the poly-crystalline material, wherein a mechanical stress induced through the plating layer is amplified. Tensile or compressive strain may be induced in a crystalline substrate. Electron or hole mobility may be increased and on-resistance characteristics of a MOS field effect transistor may be improved.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.