Semiconductor chip and method of manufacturing the same
US7843068B2 · kind B2 · utility
17Cited by
2References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2006 |
| Grant date | Nov 30, 2010 |
| Priority date | — |
| Expiry date | Feb 23, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip includes a semiconductor substrate 11, a through via 12 provided in a through hole 17 that passes through the semiconductor substrate 11, insulating layers 21-1 to 21-3 laminated on the semiconductor substrate 11, a multi-layered wiring structure 14 having a first wiring pattern 22 and a second wiring pattern 23, and an external connection terminal 15 provided on an uppermost layer of the multi-layered wiring structure 14, wherein the through via 12 and the external connection terminal 15 are connected electrically by the second wiring pattern 23.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.