Semiconductor package having through holes
US7843072B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2008 |
| Grant date | Nov 30, 2010 |
| Priority date | — |
| Expiry date | Nov 29, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18161
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a semiconductor package. The semiconductor package is configured to form a plurality of through holes for forming a through silicon via at once using a sawing device used for wafer sawing instead of a separate laser drilling equipment or a deep reactive ion etching (DRIE) equipment. Accordingly, the semiconductor package saves fabricating time and increases fabrication yield, saves costs for a laser drilling equipment or a DRIE equipment, and prevents various defects generated in an inner portion of a through hole in the case of using the laser drilling equipment or the DRIE equipment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.