Method for renaming a large number of registers in a data processing system using a background channel
US7844800B2 · kind B2 · utility
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24Claims
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Key dates
| Filing date | Aug 21, 2007 |
| Grant date | Nov 30, 2010 |
| Priority date | — |
| Expiry date | Nov 7, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3858
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor 2 utilising register renaming executes program instructions requiring a large number of architectural register specifiers to be renamed by dividing the renaming tasks into an initial set and a remaining set. The initial set are performed first and the results passed via a main channel 32 for further processing. The remaining set are performed in sequence with the results being passed via a background channel 34 for further processing. This technique is particularly useful for performing renaming operations for load/store multiple LDM instructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.