Process for manufacturing a high-quality SOI wafer
US7846811B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2006 |
| Grant date | Dec 7, 2010 |
| Priority date | — |
| Expiry date | Nov 14, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3247
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a process for manufacturing a SOI wafer, the following steps are envisaged: forming, in a monolithic body of semiconductor material having a front face, a buried cavity, which extends at a distance from the front face and delimits, with the front face, a surface region of the monolithic body, the surface region being surrounded by a bulk region and forming a flexible membrane suspended above the buried cavity; forming, through the monolithic body, at least one access passage, which reaches the buried cavity; and filling the buried cavity uniformly with an insulating region. The surface region is continuous and formed by a single portion of semiconductor material, and the buried cavity is contained and completely insulated within the monolithic body; the step of forming at least one access passage is performed after the step of forming a buried cavity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.