Address decoder
US7848173B1 · kind B1 · utility
4Cited by
9References
27Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 17, 2007 |
| Grant date | Dec 7, 2010 |
| Priority date | — |
| Expiry date | Jan 18, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An address decoder includes N predecoders that receive and logically combine a clock signal and respective address signals to periodically provide respective addresses and complementary addresses. N is an integer greater than one. A first decoder receives the respective addresses and complementary addresses and generates a decoder output based on the received respective addresses and complementary addresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.