Isolated Germanium nanowire on Silicon fin
US7851790B2 · kind B2 · utility
37Cited by
5References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2008 |
| Grant date | Dec 14, 2010 |
| Priority date | — |
| Expiry date | Mar 12, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/024
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention describes a method of and an apparatus for providing a wafer, the wafer including Silicon; etching trenches in the wafer to form Silicon fins; filling Silicon Oxide in the trenches; planarizing the Silicon Oxide; recessing the Silicon Oxide to a first thickness to form exposed Silicon pedestals from the Silicon fins; depositing SiGe over the exposed Silicon pedestal; recessing the Silicon Oxide to a second thickness; undercutting the exposed Silicon pedestals to form necked-in Silicon pedestals; oxidizing thermally and annealing the SiGe; and forming Germanium nanowires.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.