Digitally adjustable quantization circuit
US7852253B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2009 |
| Grant date | Dec 14, 2010 |
| Priority date | — |
| Expiry date | Mar 23, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/365
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Apparatus and methods are provided for converting an analog input signal to a digital output value. A quantization circuit comprises an input node and a comparator array, wherein each comparator of the comparator array is coupled to the input node. A voltage divider arrangement is coupled to the comparator array and configured to establish a respective threshold voltage for each comparator of the comparator array. The comparator array generates a digital code based on the input signal and the respective threshold voltage for each comparator. A control node is coupled to the voltage divider arrangement, wherein the control node and the voltage divider arrangement are cooperatively configured to adjust the threshold voltage for at least one comparator of the comparator array in response to a control signal at the control node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.