Lock sequencing to reorder and grant lock requests from multiple program threads
US7853951B2 · kind B2 · utility
10Cited by
17References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2005 |
| Grant date | Dec 14, 2010 |
| Priority date | — |
| Expiry date | Aug 13, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/52
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In general, in one aspect, the disclosure describes a processor that includes multiple multi-threaded programmable units integrated on a single die. The die also includes circuitry communicatively coupled to the programmable units that reorders and grants lock requests received from the threads based on an order in which the threads requested insertion into a sequence of lock grants.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.