Inventor · Ottawa, ON, CA

Sanjeev Kumar Jain

109Patents
11h-index
116Co-inventors
83Inventor score

Filing activity: Feb 26, 1988 → Feb 23, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US7366865B2 Enqueueing entries in a packet queue referencing packets Physics 64 Expired
US6417092B1 Low dielectric constant etch stop films Electricity 58 Expired
US5151071A Isoinertial lifting device Human Necessities 53 Expired
US5209240A Device for inducing and registering imbalance Physics 35 Expired
US5337757A Device for inducing and registering imbalance Physics 31 Expired
US6694397B2 Request queuing system for a PCI bridge Physics 16 Expired
US5400800A Device for measuring lumbar spinal movement Human Necessities 16 Expired
US6465044B1 Chemical vapor deposition of silicon oxide films using alkylsiloxane oligomers with ozone Electricity 14 Expired
US10102559B1 Diversification of recommendations Electricity 14 Active
US6764952B1 Systems and methods to retard copper diffusion and improve film adhesion for a dielectric barrier on copper Emerging Cross-Sectional Technologies 13 Expired
US7467256B2 Processor having content addressable memory for block-based queue structures Electricity 11 Expired
US4972711A Isometric lifting device Emerging Cross-Sectional Technologies 10 Expired
US7853951B2 Lock sequencing to reorder and grant lock requests from multiple program threads Physics 10 Active
US8040746B2 Efficient word lines, bit line and precharge tracking in self-timed memory device Physics 9 Active
US7426215B2 Method and apparatus for scheduling packets Electricity 8 Active
US8628376B2 In-line wafer thickness sensing Electricity 7 Active
US7418543B2 Processor having content addressable memory with command ordering Physics 7 Expired
US8444372B2 Passive cooling system for a turbomachine Mechanical Engineering; Lighting; Heating 6 Active
US9001569B1 Input trigger independent low leakage memory circuit Physics 6 Active
US7240164B2 Folding for a multi-threaded network processor Physics 5 Expired
US7555630B2 Method and apparatus to provide efficient communication between multi-threaded processing elements in a processor unit Physics 5 Active
US11080596B1 Prediction filtering using intermediate model representations Physics 5 Active
US8223572B2 Efficient word lines, bit line and precharge tracking in self-timed memory device Physics 4 Active
US7940545B2 Low power read scheme for read only memory (ROM) Physics 4 Active
US7554908B2 Techniques to manage flow control Electricity 4 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.