Selective deactivation of processor cores in multiple processor core systems
US7856562B2 · kind B2 · utility
6Cited by
22References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 2, 2007 |
| Grant date | Dec 21, 2010 |
| Priority date | — |
| Expiry date | Oct 10, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes applying a voltage to a first processor core of a plurality of processor cores to deactivate the first processor core, the voltage less than a retention voltage of the first processor core. The application of the voltage can be in response to a software setting. The software setting can be configured via a user input, a software application, an operating system, or a BIOS setting. Alternately, the application of the voltage can be in response to a permanent hardware setting, such as the state of a fuse associated with the first processor core.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.