Memory devices and formation methods
US7858468B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2008 |
| Grant date | Dec 28, 2010 |
| Priority date | — |
| Expiry date | Mar 19, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8828
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes forming an electrical insulator material over an integrated circuit having a metal-containing conductive interconnect and activating a dopant in a semiconductor material of a substrate to provide a doped region. The doped region provides a junction of opposite conductivity types. After activating the dopant, the substrate is bonded to the insulator material and at least some of the substrate is removed where bonded to the insulator material. After the removing, a memory cell is formed having a word line, an access diode, a state-changeable memory element containing chalcogenide phase change material, and a bit line all electrically connected in series, the access diode containing the junction as a p-n junction. A memory device includes an adhesion material over the insulator material and bonding the word line to the insulator material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.