Method for fabricating a sealed cavity microstructure
US7863063B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 4, 2008 |
| Grant date | Jan 4, 2011 |
| Priority date | — |
| Expiry date | Apr 23, 2029 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2203/0136
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method for fabricating a sealed cavity microstructure comprises the steps of: forming an insulation layer with a micro-electro-mechanical structure on an upper surface of a silicon substrate, the micro-electro-mechanical structure includes at least one suspended structure and at least one conductive structure between which is disposed a spacer region; after an etching, filling a sacrificial layer into the spacer region and on the surface of the conductive structure; forming holes in the sacrificial layer correspondingly to the conductive structure; depositing a cap layer into the holes and the surface; after removing the sacrificial layer, utilizing the clearance of the cap layer to carry out a further etching to realize the suspension of the micro-electro-mechanical structure; and finally, utilizing a sealing layer to achieve the sealing effect. By such arrangements, the exposure of the micro-electro-mechanical structure can be effectively prevented, and the final package cost can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.