Packaged electronic modules and fabrication methods thereof implementing a cell phone or other electronic system
US7863090B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2008 |
| Grant date | Jan 4, 2011 |
| Priority date | — |
| Expiry date | Dec 17, 2028 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49155
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Circuit structures and methods of fabrication are provided for facilitating implementing a complete electronic system in a compact package. The circuit structure includes, in one embodiment, a chips-first multichip base layer with conductive structures extending therethrough. An interconnect layer is disposed over the front surface of the multichip layer and includes interconnect metallization electrically connected to contact pads of the chips and to conductive structures extending through the structural material. A redistribution layer, disposed over the back surface of the multichip layer, includes a redistribution metallization also electrically connected to conductive structures extending through the structural material. Input/output contacts are arrayed over the redistribution layer, including over the lower surfaces of at least some integrated circuit chips within the multichip layer, and are electrically connected through the redistribution metallization, conductive structures, and interconnect metallization to contact pads of the integrated circuit chips of the multichip layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.