Embedded die package and process flow using a pre-molded carrier
US7863096B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 17, 2008 |
| Grant date | Jan 4, 2011 |
| Priority date | — |
| Expiry date | Oct 7, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embedded die package includes a carrier with an electrical device in the cavity of the carrier, a first dielectric layer covering the sides and top of the electrical device except for vias over selected bonding pads of the electrical device, a plurality of metal conductors, each of which is in contact with at least one of the vias, one or more additional dielectric layers lying over the metal conductors and the first dielectric layer, wherein a top layer of the one or more dielectric layers has openings with metalization underneath coupled to at least one of the metal conductors, and solder bumps protruding from each of the openings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.